Nobuyuki Hikichi

According to our database, Nobuyuki Hikichi authored at least 8 papers between 1991 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Cool System scalable 3-D stacked heterogeneous Multi-Core / Multi-Chip architecture for ultra low-power digital TV applications.

Yukoh Matsumoto, Tomoyuki Morimoto, Michiya Hagimoto, Hiroyuki Uchida, Nobuyuki Hikichi, Fumito Imura, Hiroshi Nakagawa, Masahiro Aoyagi

Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012

1996

A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts.

Nguyen-Ngoc Bình, Masaharu Imai, Akichika Shiomi, Nobuyuki Hikichi

Proceedings of the 33st Conference on Design Automation, 1996

1995

A hardware/software partitioning algorithm for pipelined instruction set processor.

Nguyen-Ngoc Bình, Masaharu Imai, Nobuyuki Hikichi

Proceedings of the Proceedings EURO-DAC'95, 1995

A hardware/software codesign method for pipelined instruction set processor using adaptive database.

Nguyen-Ngoc Bình, Masaharu Imai, Akichika Shiomi, Nobuyuki Hikichi

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1993

An ASIP instruction set optimization algorithm with functional module sharing constraint.

Alauddin Alomary, Takeharu Nakata, Yoshimichi Honma, Masaharu Imai, Nobuyuki Hikichi

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

PEAS-I: A hardware/software co-design system for ASIPs.

Alauddin Alomary, Takeharu Nakata, Yoshimichi Honma, Jun Sato, Nobuyuki Hikichi, Masaharu Imai

Proceedings of the European Design Automation Conference 1993, 1993

1992

An integer programming approach to instruction implementation method selection problem.

Masaharu Imai, Jun Sato, Alauddin Alomary, Nobuyuki Hikichi

Proceedings of the conference on European design automation, 1992

1991

An Integrated Design Environment for Application Specific Integrated Processor.

Jun Sato, Masaharu Imai, Tetsuya Hakata, Alauddin Y. Alomary, Nobuyuki Hikichi

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991