Gabriele Zanoletti

According to our database, Gabriele Zanoletti authored at least 5 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk.

Luca Ricci, Gabriele Bè, Michele Rocco, Lorenzo Scaletti, Gabriele Zanoletti, Luca Bertulessi, Andrea L. Lacaita, Salvatore Levantino, Carlo Samori, Andrea Bonfanti

IEEE J. Solid State Circuits, February, 2025

A Complementary Bootstrapped Sampler for High-Frequency High-Resolution ADCs.

Alessia Ceroni, Gabriele Zanoletti, Enrico Albezzano, Andrea Giovanni Bonfanti, Carlo Samori

Proceedings of the International Conference on IC Design and Technology, 2025

A 20MHz-BW 12.3-ENOB NS SAR ADC with a 3^rd-order Multi-Input Filter and a PVT-Robust Ratio-Based FIA.

Gabriele Zanoletti, Gabriele Bè, Michele Rocco, Luca Ricci, Alessia Ceroni, Salvatore Levantino, Andrea Leonardo Lacaita, Luca Bertulessi, Andrea Bonfanti, Carlo Samori

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

A 250-MS/s 9.9-ENOB 80.7 dB-SFDR Top-Plate Input SAR ADC With Charge Linearization.

Gabriele Zanoletti, Lorenzo Scaletti, Gabriele Bè, Luca Ricci, Michele Rocco, Luca Bertulessi, Carlo Samori, Andrea Bonfanti

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A Highly Energy-Efficient FIA-based AZ-free Ring Amplifier for Pipeline-SAR ADCs.

Alessia Ceroni, Gabriele Zanoletti, Andrea Bonfanti, Carlo Samori

Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024