Gabriele Zanoletti

Orcid: 0000-0003-1179-2675

According to our database1, Gabriele Zanoletti authored at least 7 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
11.3 A 500MS/s 12b Pipe-SAR ADC Using a Triple-Cascode FIA with Virtual Supply Extension.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025
An Analysis of Switch Thermal Noise in SAR Converters.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2025

A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk.
IEEE J. Solid State Circuits, February, 2025

A Complementary Bootstrapped Sampler for High-Frequency High-Resolution ADCs.
Proceedings of the International Conference on IC Design and Technology, 2025

A 20MHz-BW 12.3-ENOB NS SAR ADC with a 3<sup>rd</sup>-order Multi-Input Filter and a PVT-Robust Ratio-Based FIA.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024
A 250-MS/s 9.9-ENOB 80.7 dB-SFDR Top-Plate Input SAR ADC With Charge Linearization.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A Highly Energy-Efficient FIA-based AZ-free Ring Amplifier for Pipeline-SAR ADCs.
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024


  Loading...