George B. Nardes

According to our database, George B. Nardes authored at least 5 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A resource-constrained CNN accelerator for real-time license plate character recognition on FPGA platforms.

George B. Nardes, Thiago H. Rausch, Bruna Henning Pereira, Douglas R. Melo, Cesar A. Zeferino

Integr., 2026

2025

Energy-Efficient CNN Hardware Accelerator for Real-Time Construction Progress Monitoring.

George B. Nardes, Luiz Fernando Heidrich Duarte, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino

IEEE Access, 2025

A Low-Cost Accelerator for License Plate Character Recognition Using Convolutional Neural Networks.

George B. Nardes, Thiago H. Rausch, Douglas R. Melo, Cesar A. Zeferino

Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

Evaluating FPGA Architectures for Quantized CNN Inference in Construction Monitoring Applications.

George B. Nardes, Wesley Grignani, Thiago H. Rausch, Luiz Fernando Heidrich Duarte, Douglas R. Melo, Cesar A. Zeferino

Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025

2024

Deep Nibble: A 4-bit Number Format for Efficient DNN Training and Inference in FPGA.

Luiz Fernando Heidrich Duarte, George B. Nardes, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024