Thiago H. Rausch
Orcid: 0009-0003-7230-1224
According to our database1,
Thiago H. Rausch authored at least 6 papers
between 2025 and 2026.
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Bibliography
2026
A resource-constrained CNN accelerator for real-time license plate character recognition on FPGA platforms.
Integr., 2026
Resilience Analysis of a Fault-Tolerant MPSoC Interconnection Architecture Under SEU Fault Injection.
Proceedings of the 27th IEEE Latin American Test Symposium, 2026
2025
Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025
A Low-Cost Accelerator for License Plate Character Recognition Using Convolutional Neural Networks.
Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025
Evaluating FPGA Architectures for Quantized CNN Inference in Construction Monitoring Applications.
Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025
Reliability and Performance Evaluation of a Fault-Tolerant MPSoC Interconnection Architecture.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2025