Douglas R. Melo

According to our database, Douglas R. Melo authored at least 34 papers between 2014 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A resource-constrained CNN accelerator for real-time license plate character recognition on FPGA platforms.

George B. Nardes, Thiago H. Rausch, Bruna Henning Pereira, Douglas R. Melo, Cesar A. Zeferino

Integr., 2026

Design and Reliability Analysis of a Pipeline RISC-V Processor Core.

Douglas A. dos Santos, Wesley Grignani, Carolina Imianosky, Douglas R. Melo, Luigi Dilillo

Proceedings of the 27th IEEE Latin American Test Symposium, 2026

Resilience Analysis of a Fault-Tolerant MPSoC Interconnection Architecture Under SEU Fault Injection.

Thiago H. Rausch, Wesley Grignani, Luigi Dilillo, Douglas R. Melo

Proceedings of the 27th IEEE Latin American Test Symposium, 2026

Characterization of a Fault-Tolerant RISC-V SoC in an SRAM-based FPGA Under Proton Irradiation.

Wesley Grignani, Douglas A. dos Santos, Carolina Imianosky, Douglas R. Melo, Frédéric Wrobel, Luigi Dilillo

Proceedings of the 27th IEEE Latin American Test Symposium, 2026

2025

A Dependable and Low-Cost CCSDS 123 Hyperspectral Image Compressor.

Wesley Grignani, Douglas A. dos Santos, Felipe Viel, Luigi Dilillo, Douglas R. Melo

IEEE Embed. Syst. Lett., February, 2025

A fault-tolerant CCSDS 123 hardware accelerator for space applications.

Wesley Grignani, Felipe Viel, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo

Integr., 2025

Energy-Efficient CNN Hardware Accelerator for Real-Time Construction Progress Monitoring.

George B. Nardes, Luiz Fernando Heidrich Duarte, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino

IEEE Access, 2025

Hardening an AMBA-AXI Network Interface for a Reliable Network-on-Chip.

Thiago H. Rausch, Wesley Grignani, Gustavo H. S. Müller, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo

Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

A Low-Cost Accelerator for License Plate Character Recognition Using Convolutional Neural Networks.

George B. Nardes, Thiago H. Rausch, Douglas R. Melo, Cesar A. Zeferino

Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

Evaluating FPGA Architectures for Quantized CNN Inference in Construction Monitoring Applications.

George B. Nardes, Wesley Grignani, Thiago H. Rausch, Luiz Fernando Heidrich Duarte, Douglas R. Melo, Cesar A. Zeferino

Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025

FPGA-Based Platform for Food Classification Using Hyperspectral Images.

Leonardo Januário, Bruna Henning Pereira, Bruno J. Mello, Douglas R. Melo, Felipe Viel, Cesar A. Zeferino

Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025

Reliability and Performance Evaluation of a Fault-Tolerant MPSoC Interconnection Architecture.

Thiago H. Rausch, Wesley Grignani, Luigi Dilillo, Douglas R. Melo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2025

2024

Deep Nibble: A 4-bit Number Format for Efficient DNN Training and Inference in FPGA.

Luiz Fernando Heidrich Duarte, George B. Nardes, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Special Session: Reliability and Performance Evaluation of a RISC-V Vector Extension Unit for Vector Multiplication.

Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

Implementation and Reliability Evaluation of a ChaCha20 Stream Cipher Hardware Accelerator.

Wesley Grignani, Khalil G. Queiroz de Santana, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

Reliability Analysis of a Low-Cost CCSDS 123 Hyperspectral Image Compressor.

Wesley Grignani, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

2023

Using HARV-SoC for Reliable Sensing Applications in Radiation Harsh Environments.

André Martins Pio de Mattos, Douglas A. dos Santos, Carolina Imianosky, Douglas R. Melo, Luigi Dilillo

Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023

Characterization of a Fault-Tolerant RISC-V System-on-Chip for Space Environments.

Douglas A. dos Santos, André Martins Pio de Mattos, Douglas R. Melo, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Hardening a Real-Time Operating System for a Dependable RISC-V System-on-Chip.

Benjamin W. Mezger, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

Implementation and Reliability Evaluation of a RISC-V Vector Extension Unit.

Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression.

Wesley Grignani, Douglas A. dos Santos, Luigi Dilillo, Felipe Viel, Douglas R. Melo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022

A Survey of the RISC-V Architecture Software Support.

Benjamin W. Mezger, Douglas A. dos Santos, Luigi Dilillo, Cesar A. Zeferino, Douglas R. Melo

IEEE Access, 2022

Neutron Irradiation Testing and Analysis of a Fault-Tolerant RISC-V System-on-Chip.

Douglas A. dos Santos, André Martins Pio de Mattos, Lucas M. Luza, Carlo Cazzaniga, Maria Kastriotou, Douglas R. Melo, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021

MPI hardware framework for many-core based embedded systems.

Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales, Eduardo Augusto Bezerra

Int. J. Sens. Networks, 2021

Characterization of a RISC-V System-on-Chip under Neutron Radiation.

Douglas A. dos Santos, Lucas M. Luza, Maria Kastriotou, Carlo Cazzaniga, Cesar A. Zeferino, Douglas R. Melo, Luigi Dilillo

Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router.

Douglas Rossi Melo, César Albenes Zeferino, Eduardo Augusto Bezerra, Luigi Dilillo

Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

2020

A Low-Cost Fault-Tolerant RISC-V Processor for Space Systems.

Douglas Almeida dos Santos, Lucas Matana Luza, César Albenes Zeferino, Luigi Dilillo, Douglas Rossi de Melo

Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020

2019

Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers Design.

Douglas R. Melo, Cesar A. Zeferino, Luigi Dilillo, Eduardo A. Bezerra

Sensors, 2019

Analyzing the Error Propagation in a Parameterizable Network-on-Chip Router.

Douglas Rossi de Melo, César Albenes Zeferino, Luigi Dilillo, Eduardo Augusto Bezerra

Proceedings of the IEEE Latin American Test Symposium, 2019

A Low-Cost Hardware Accelerator for CCSDS 123 Predictor in FPGA.

Lucas M. V. Pereira, Douglas A. dos Santos, Cesar A. Zeferino, Douglas R. Melo

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Characterization of a RISC-V Microcontroller Through Fault Injection.

Dario Asciolla, Luigi Dilillo, Douglas A. dos Santos, Douglas R. Melo, Alessandra Menicucci, Marco Ottavi

Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019

2018

Analysis of LEON3 systems integration for a Network-on-Chip.

Lucas M. V. Pereira, Douglas R. Melo, Cesar A. Zeferino, Eduardo A. Bezerra

Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

A Hardware Accelerator for Anisotropic Diffusion Filtering in FPGA.

Guilherme F. Weidle, Felipe Viel, Douglas Rossi de Melo, Cesar A. Zeferino

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2014

XIRU: Interface de Rede Extensível para Integração de Núcleos a uma Rede-em-Chip.

Douglas R. Melo, Michelle S. Wangham, Cesar A. Zeferino

RITA, 2014