Geum-Young Tak

According to our database, Geum-Young Tak authored at least 3 papers between 2005 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A Low-Reference Spur MDLL-Based Clock Multiplier and Derivation of Discrete-Time Noise Transfer Function for Phase Noise Analysis.

Geum-Young Tak, Kwyro Lee

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2016

A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers.

Heein Yoon, Yongsun Lee, Younghyun Lim, Geum-Young Tak, Hong-Teuk Kim, Yo-Chuol Ho, Jaehyouk Choi

IEEE J. Solid State Circuits, 2016

2005

A 6.3-9-GHz CMOS fast settling PLL for MB-OFDM UWB applications.

Geum-Young Tak, Seok-Bong Hyun, Tae Young Kang, Byoung Gun Choi, Seong Su Park

IEEE J. Solid State Circuits, 2005