Ghanshyam Nayak

According to our database, Ghanshyam Nayak authored at least 6 papers between 2002 and 2005.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2005

System in a Package Design of a RF Front End System Using Application Specific Reduced Order Models.

Ghanshyam Nayak, Clyde Washburn, P. R. Mukund

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004

Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package.

Ghanshyam Nayak, P. R. Mukund

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A generic macromodel for coupling between inductors and interconnects for R.F.I.C. layouts.

Tejasvi Das, Ghanshyam Nayak, Ponnathpur R. Mukund

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

DREAM: A Chip-Package Co-Design Tool for RF-Mixed Signal Systems.

Ghanshyam Nayak, Tejasvi Das, T. M. Rao, P. R. Mukund

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

2003

LNA design optimization with reference to ESD protection circuitry.

S. Sridharan, Ghanshyam Nayak, P. R. Mukund

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Analysis of VCO jitter in chip-package co-design.

H. Parthasarathy, Ghanshyam Nayak, Ponnathpur R. Mukund

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002