Tejasvi Das

According to our database1, Tejasvi Das authored at least 11 papers between 2004 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2007
Sensitivity analysis for fault-analysis and tolerance in RF front-end circuitry.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Towards Fault-Tolerant RF Front Ends.
J. Electron. Test., 2006

Self-calibration of gain and output match in LNAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Self-calibration of input-match in RF front-end circuitry.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

An Ultra-Fast, On-Chip BiST for RF Low Noise Amplifiers.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Use of source degeneration for non-intrusive BIST of RF front-end circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A Low Noise Current-mode Readout circuit for CMOS Image Sensing Applications.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A generic macromodel for coupling between inductors and interconnects for R.F.I.C. layouts.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

DREAM: A Chip-Package Co-Design Tool for RF-Mixed Signal Systems.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Dynamic Input Match Correction in RF Low Noise Amplifiers.
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004


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