Tejasvi Das
Orcid: 0000-0003-0173-4682
According to our database1,
Tejasvi Das authored at least 23 papers
between 2004 and 2026.
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Bibliography
2026
A Sub-μA LDO With Analog Adaptive Enhancements for Scalable PSRR, Load Range, and Bandwidth Extension.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2026
Leveraging Non-Equilibrium ECRAM Dynamics for Short-Term Plasticity in Neuromorphic Circuits.
CoRR, May, 2026
Proceedings of the 44th IEEE VLSI Test Symposium, 2026
2025
Enabling Long Chain Lengths and High-Throughput for Time-Domain Neuromorphic Computing.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2025
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025
2024
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024
A High-Efficiency Capacitor-Less LDO with Adaptive Dynamic Range Extension for Biosensing Applications.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Design Space Exploration of Memristor-based Delay Cells for Time-domain Neuromorphic Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
IEEE Trans. Circuits Syst. II Express Briefs, 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
A generic macromodel for coupling between inductors and interconnects for R.F.I.C. layouts.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004