Ponnathpur R. Mukund

According to our database1, Ponnathpur R. Mukund authored at least 35 papers between 1993 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2018
A sub 1-volt subthreshold bandgap reference at the 14 nm FinFET node.
Microelectron. J., 2018

2015
Positive feedback for gain enhancement in sub-100 nm multi-GHz CMOS amplifier design.
Int. J. Circuit Theory Appl., 2015

A comparative study of multi-GHz LCVCOs designed in 28nm CMOS technology.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

2014
An ultra-thin oxide sub-1 V CMOS bandgap voltage reference.
Int. J. Circuit Theory Appl., 2014

2011
Analog IC Design in Ultra-Thin Oxide CMOS Technologies With Significant Direct Tunneling-Induced Gate Current.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Scaling the bulk-driven MOSFET into deca-nanometer bulk CMOS processes.
Microelectron. Reliab., 2011

2010
Passive and Active Reduction Techniques for On-Chip High-Frequency Digital Power Supply Noise.
IEEE Trans. Very Large Scale Integr. Syst., 2010

From Film to Silicon: The Migration of Document Archiving Technology.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

2007
Sensitivity analysis for fault-analysis and tolerance in RF front-end circuitry.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Towards Fault-Tolerant RF Front Ends.
J. Electron. Test., 2006

A universal common-source and common-drain model for 1-20GHz frequency range.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

An analytical propagation delay model with power supply noise effects.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Self-calibration of gain and output match in LNAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
1/f noise synthesis model in discrete-time for circuit simulation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Self-calibration of input-match in RF front-end circuitry.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

A current based self-test methodology for RF front-end circuits.
Microelectron. J., 2005

System in a Package Design of a RF Front End System Using Application Specific Reduced Order Models.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

An Ultra-Fast, On-Chip BiST for RF Low Noise Amplifiers.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Use of source degeneration for non-intrusive BIST of RF front-end circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Accurate performance prediction of multi-GHz CML with data run-length variations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A Current Sensor for On-Chip, Non-Intrusive Testing of RF Systems.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A Low Noise Current-mode Readout circuit for CMOS Image Sensing Applications.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A Tuned Wideband LNA in 0.25µm IBM Process For RF Communication Applications.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A generic macromodel for coupling between inductors and interconnects for R.F.I.C. layouts.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

A compensation technique for transistor mismatch in current mirrors.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

DREAM: A Chip-Package Co-Design Tool for RF-Mixed Signal Systems.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Dynamic Input Match Correction in RF Low Noise Amplifiers.
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

2003
LNA design optimization with reference to ESD protection circuitry.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

1/f noise modeling using discrete-time self-similar systems.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Analysis of VCO jitter in chip-package co-design.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

1995
A novel CMOS monolithic analog multiplier with wide input dynamic range.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1993
MCM: The High-Performance Electronic Packaging Technology.
Computer, 1993

Signal Routing with Temporal Constraints.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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