Gian-Franco Dalla Betta

Orcid: 0000-0001-5516-9282

According to our database1, Gian-Franco Dalla Betta authored at least 16 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
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PhD thesis 
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Online presence:

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Bibliography

2023
TCAD Analysis of Leakage Current and Breakdown Voltage in Small Pitch 3D Pixel Sensors.
Sensors, 2023

2021
Design and Characterization of Backside Termination Structures for Thick Fully-Depleted MAPS.
Sensors, 2021

Fully Depleted Monolithic Active Microstrip Sensors: TCAD Simulation Study of an Innovative Design Concept.
Sensors, 2021

2016
Crosstalk mapping in CMOS SPAD arrays.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2014
Compact CMOS Analog Counter for SPAD Pixel Arrays.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Analytical approach of the impact of through silicon via on the performance of MOS devices.
Proceedings of the 9th International Design and Test Symposium, 2014

IR-optimized silicon demodulating detector with 3-dimensional electrodes.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
3D camera based on linear-mode gain-modulated avalanche photodiodes.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Compact analog counting SPAD pixel with 1.9% PRNU and 530ps time gating.
Proceedings of the ESSCIRC 2013, 2013

2010
Enhancement of RF-MEMS switch reliability through an active anti-stiction heat-based mechanism.
Microelectron. Reliab., 2010

2008
High-performance PIN photodiodes on TMAH thinned silicon wafers.
Microelectron. J., 2008

2007
A CMOS 3-D Imager Based on Single Photon Avalanche Diode.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

2005
Design of electro-optical demodulating pixel in CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2002
Novel CMOS image sensor with a 132-dB dynamic range.
IEEE J. Solid State Circuits, 2002

2001
Compact CMOS implementation of a low‐power, current‐mode programmable cellular neural network.
Int. J. Circuit Theory Appl., 2001

A CMOS ASIC for differential read-out of ISFET sensors.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


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