Gianluca Roascio
Orcid: 0000-0003-0457-0855
According to our database1,
Gianluca Roascio authored at least 12 papers
between 2019 and 2026.
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Bibliography
2026
Empirical Evaluation of the Resistance of Novel Non-Algebraic AES S-Boxes to Power Side-Channel Attacks.
Proceedings of the Joint National Conference on Cybersecurity (ITASEC & SERICS 2026), 2026
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Access, 2022
Remotizing and Virtualizing Chips and Circuits for Hardware-based Capture-the-Flag Challenges.
Proceedings of the IEEE European Symposium on Security and Privacy, 2022
Proceedings of the IEEE European Test Symposium, 2022
2021
Proceedings of the Italian Conference on Cybersecurity, 2021
Proceedings of the IEEE East-West Design & Test Symposium, 2021
2020
Proceedings of the Fourth Italian Conference on Cyber Security, 2020
Proceedings of the IEEE East-West Design & Test Symposium, 2020
A FPGA-based Control-Flow Integrity Solution for Securing Bare-Metal Embedded Systems.
Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020
2019
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019