Gianluca Roascio

Orcid: 0000-0003-0457-0855

According to our database1, Gianluca Roascio authored at least 10 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Toward Register Spilling Security Using LLVM and ARM Pointer Authentication.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

HArMoNICS: High-Assurance Microgrid Network Infrastructure Case Study.
IEEE Access, 2022

Remotizing and Virtualizing Chips and Circuits for Hardware-based Capture-the-Flag Challenges.
Proceedings of the IEEE European Symposium on Security and Privacy, 2022

Real-Time Control-Flow Integrity for Multicore Mixed-Criticality IoT Systems.
Proceedings of the IEEE European Test Symposium, 2022

2021
PAIDEUSIS: A Remote Hybrid Cyber Range for Hardware, Network, IoT Security Training.
Proceedings of the Italian Conference on Cybersecurity, 2021

AFTAB: A RISC-V Implementation with Configurable Gateways for Security.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

2020
Hardware Security, Vulnerabilities, and Attacks: A Comprehensive Taxonomy.
Proceedings of the Fourth Italian Conference on Cyber Security, 2020

Hardware-based Capture-The-Flag Challenges.
Proceedings of the IEEE East-West Design & Test Symposium, 2020

A FPGA-based Control-Flow Integrity Solution for Securing Bare-Metal Embedded Systems.
Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020

2019
CFI: Control Flow Integrity or Control Flow Interruption?
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019


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