Hae-Wook Choi

According to our database, Hae-Wook Choi authored at least 18 papers between 1995 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Spatial Modulation for High-Rate Transmission Systems.

Thu Phuong Nguyen, Minh-Tuan Le, Vu-Duc Ngo, Xuan-Nam Tran, Hae-Wook Choi

Proceedings of the IEEE 79th Vehicular Technology Conference, 2014

Efficient guard interval reduction for coherent optical OFDM.

Hae Young Rha, Byoung Gu Jeon, Hae-Wook Choi

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

2010

A Calibration Scheme for Delay Mismatch Compensation in OFDM-Based Polar Transmitter.

Hun-sik Kang, Min-Lee Hwang, Jin Lee, Sok-Kyu Lee, Hae-Wook Choi, Sin-Chong Park

IEICE Trans. Commun., 2010

2007

Performance and Complexity Analysis of Credit-Based End-to-End Flow Control in Network-on-Chip.

Seongmin Noh, Daehyun Kim, Vu-Duc Ngo, Hae-Wook Choi

Proceedings of the Parallel and Distributed Processing and Applications, 2007

An QoS Aware Mapping of Cores Onto NoC Architectures.

Huy Nam Nguyen, Vu-Duc Ngo, Younghwan Bae, Hanjin Cho, Hae-Wook Choi

Proceedings of the Parallel and Distributed Processing and Applications, 2007

Latency Optimization for NoC Design of H.264 Decoder Based on Self-similar Traffic Modeling.

Vu-Duc Ngo, June-Young Chang, Younghwan Bae, Hanjin Cho, Hae-Wook Choi

Proceedings of the Parallel and Distributed Processing and Applications, 2007

2006

Accelerating Verification with Reusable Testbench.

Jungbo Son, Hae-Wook Choi, Sin-Chong Park

IEICE Trans. Inf. Syst., 2006

Low Latency and Memory Efficient Viterbi Decoder Using Modified State-Mapping Method.

Sang-Ho Seo, Hae-Wook Choi, Sin-Chong Park

IEICE Trans. Commun., 2006

Instruction Based Synthesizable Testbench Architecture.

Ho-Seok Choi, Hae-Wook Choi, Sin-Chong Park

IEICE Trans. Electron., 2006

The Optimum Network on Chip Architectures for Video Object Plane Decoder Design.

Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi

Proceedings of the Parallel and Distributed Processing and Applications, 2006

Throughput Aware Mapping for Network on Chip Design of H.264 Decoder.

Vu-Duc Ngo, Huy Nam Nguyen, Younghwan Bae, Hanjin Cho, Hae-Wook Choi

Proceedings of the Frontiers of High Performance Computing and Networking, 2006

2005

Realization of Video Object Plane Decoder on On-Chip Network Architecture.

Huy Nam Nguyen, Vu-Duc Ngo, Hae-Wook Choi

Proceedings of the Embedded Software and Systems, Second International Conference, 2005

Designing On-Chip Network Based on Optimal Latency Criteria.

Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi

Proceedings of the Embedded Software and Systems, Second International Conference, 2005

Realization of video object plane decoder on mesh on-chip network architecture.

Huy Nam Nguyen, Vu-Duc Ngo, Hae-Wook Choi

Proceedings of the Third IASTED International Conference on Circuits, 2005

Analyzing the Performance of Mesh and Fat-Tree Topologies for Network on Chip Design.

Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi

Proceedings of the Embedded and Ubiquitous Computing, 2005

2004

Expurgated sphere bound for LDPC.

Vu-Duc Ngo, Hae-Wook Choi, Sin-Chong Park

Proceedings of the IEEE 15th International Symposium on Personal, 2004

An Expurgated Union Bound for Space-Time Code Systems.

Vu-Duc Ngo, Hae-Wook Choi, Sin-Chong Park

Proceedings of the Telecommunications and Networking, 2004

1995

A 10-b 20-Msample/s low-power CMOS ADC.

Won-Chul Song, Hae-Wook Choi, Sung-Ung Kwak, Bang-Sup Song

IEEE J. Solid State Circuits, May, 1995