Sung-Ung Kwak

According to our database1, Sung-Ung Kwak authored at least 21 papers between 1995 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Online presence:

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Bibliography

2024
A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization.
IEEE J. Solid State Circuits, January, 2024

9.2 A 2.08mW 64.4dB SNDR 400MS/s 12b Pipelined-SAR ADC using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8nm.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

14.6 A 10A Computational Digital LDO Achieving 263A/mm<sup>2</sup> Current Density with Distributed Power-Gating Switches and Time-Based Fast-Transient Controller for Mobile SoC Application in 3nm GAAFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

9.6 A 6<sup>th</sup>-Order Quadrature CTDSM using Double-OTA and Quadrature NSSAR with 171.3dB FoMs in 14nm.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

31.3 A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power Tracking.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A Fully Integrated IEEE 802.15.4/4z-Compliant UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28-nm Process.
IEEE J. Solid State Circuits, December, 2023

A 1.05-A/m Minimum Magnetic Field Strength Single-Chip, Fully Integrated Biometric Smart Card SoC Achieving 792.5-ms Transaction Time With Anti-Spoofing Fingerprint Authentication.
IEEE J. Solid State Circuits, 2023

A Fully Integrated IEEE 802.15.4/4z-Compliant 6.5-to-8GHz UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28nm Process.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
A Reconfigurable Series-Parallel Charger for Dual-Battery Applications with 89W 97.7<sup>%</sup> Efficiency in Direct Charging Mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 1.05A/m Minimum Magnetic Field Strength Single-Chip Fully Integrated Biometric Smart Card SoC Achieving 1014.7ms Transaction Time with Anti-Spoofing Fingerprint Authentication.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
A 10A/μs Fast Transient AOT Voltage Regulator on DDR5 DIMM with Dithered Pseudo-Constant Switching Frequency Achieving -6dB Harmonic Suppression.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Zero Current Detector with Slope Judgement Calibration in Mobile Battery Charger IC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
A 28nm 10Mb Embedded Flash Memory for IoT Product with Ultra-Low Power Near-1V Supply Voltage and High Temperature for Grade 1 Operation.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2004
A dual 10-b 200-MSPS pipelined D/A converter with DLL-based clock synthesizer.
IEEE J. Solid State Circuits, 2004

2003
A behavioral modeling approach to the design of a low jitter clock source.
IEEE Trans. Circuits Syst. II Express Briefs, 2003

A dual 10b 200MSPS pipeline D/A converter with DLL-based clock synthesizer.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2001
Design of a 14 b 100 MS/s switched-capacitor pipelined ADC in RFSiGe BiCMOS.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A triple 8b, 80MSPS 3.3 V graphics digitizer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1997
Low-Spurious Analog-to-Digital Conversion Using Multi-Stage Code-Error Calibration
PhD thesis, 1997

A 15-b, 5-Msample/s low-spurious CMOS ADC.
IEEE J. Solid State Circuits, 1997

1995
A 10-b 20-Msample/s low-power CMOS ADC.
IEEE J. Solid State Circuits, May, 1995


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