Hai-Dang Vu

According to our database, Hai-Dang Vu authored at least 5 papers between 2019 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A Hybrid Message-level Modeling Approach for Fast Yet Accurate Simulation of Multiprocessor Shared Bus Effects on Data Flow Applications Execution.

Sébastien Le Nours, Hai-Dang Vu, Ralf Stemmer, Sébastien Pillement

J. Signal Process. Syst., June, 2026

2022

A memory interference analysis using a formal timing analyzer (WIP).

Mihail Asavoae, Oumaima Matoussi, Asmae Bouachtala, Hai-Dang Vu, Mathieu Jan

Proceedings of the LCTES '22: 23rd ACM SIGPLAN/SIGBED International Conference on Languages, 2022

2021

Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems.

Hai-Dang Vu, Sébastien Le Nours, Sébastien Pillement

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC.

Hai-Dang Vu, Sébastien Le Nours, Sébastien Pillement, Ralf Stemmer, Kim Grüttner

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2019

Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs.

Ralf Stemmer, Hai-Dang Vu, Kim Grüttner, Sébastien Le Nours, Wolfgang Nebel, Sébastien Pillement

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019