Sébastien Le Nours

Orcid: 0000-0002-1562-7282

According to our database1, Sébastien Le Nours authored at least 29 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Fast Yet Accurate Timing and Power Prediction of Artificial Neural Networks Deployed on Clock-Gated Multi-Core Platforms.
Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems, 2023

2022
A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

Contributions to system-level modelling and simulation of hardware-software architectures of embedded systems. (Contributions à la modélisation et la simulation de niveau système des architectures matérielles-logicielles des systèmes embarqués).
, 2022

2021
0-1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems.
J. Syst. Archit., 2021

Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
A Generic Executable Model for Fast Yet Accurate Contention Simulation in Multiprocessor Systems.
IEEE Embed. Syst. Lett., 2020

2019
System-Level Modeling and Simulation of MPSoC Run-Time Management Using Execution Traces Analysis.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Mapping and Frequency Joint Optimization for Energy Efficient Execution of Multiple Applications on Multicore Systems.
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019

2018
A Hybrid Simulation Approach for Fast and Accurate Timing Analysis of Multi-Processor Platforms Considering Communication Resources Conflicts.
J. Signal Process. Syst., 2018

2014
Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approach.
J. Real Time Image Process., 2014

A dynamic computation method for fast and accurate performance evaluation of multi-core architectures.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
A Case Study of Simulation and Performance Evaluationof a SDR Baseband Architecture.
J. Signal Process. Syst., 2013

2012
A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level.
J. Electr. Comput. Eng., 2012

Application of temporal decoupling to the creation of efficient performance models of automotive architectures.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
A state-based modeling approach for fast performance evaluation of embedded system architectures.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

A generic execution model for efficient performance evaluation of system architectures at transaction level.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

A framework for the design of reconfigurable fault tolerant architectures.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Modeling Technique for Simulation Time Speed-up of Performance Computation in Transaction Level Models.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

2009
Transaction level modeling of a FlexRay communication network.
Proceedings of the Forum on specification and Design Languages, 2009

Transaction level modeling of an adaptive multi-standard and multi-application radio communication system.
Proceedings of the Forum on specification and Design Languages, 2009

2007
Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications.
Proceedings of the Forum on specification and Design Languages, 2007

2006
Hardware Communication Refinement in Digital Signal Processing.
Proceedings of the Forum on specification and Design Languages, 2006

2004
Design and Implementation of MC-CDMA Systems for Future Wireless Networks.
EURASIP J. Adv. Signal Process., 2004

2002
A MC-CDMA system analysis in a software radio context.
Ann. des Télécommunications, 2002

2001
Efficient implementation of a MC-CDMA transmission system for the downlink.
Proceedings of the 54th IEEE Vehicular Technology Conference, 2001


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