Haiqiu Huang

According to our database, Haiqiu Huang authored at least 6 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

FSMA: Fine-Grained Interlayer Scheduling and Mapping Co-Exploration Framework for Chiplet-Based DNN Accelerators.

Tao Lu, Yongchang Zhang, Peilin Wang, Haiqiu Huang, Zhirong Ye, Mingyu Wang

IEEE Embed. Syst. Lett., April, 2026

LRM-GPU: Alleviating Synchronization Overhead for Multi-Chiplet GPU Architecture.

Baiqing Zhong, Zhirong Ye, Xiaojie Li, Peilin Wang, Haiqiu Huang, Zhaolin Li, Zhiyi Yu, Mingyu Wang

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

2025

A Hybrid CAM-SRAM Processing-in-Memory Architecture With Feature Level Sparsity for Attention Mechanisms.

Haiqiu Huang, Mingyu Wang, Xiaojie Li, Baiqing Zhong, Zeqi Yang, Tao Lu, Yicong Zhang, Zhiyi Yu

IEEE Trans. Circuits Syst. II Express Briefs, September, 2025

C3ache: Towards Hierarchical Cache-Centric Computing for Sparse Matrix Multiplication on GPGPUs.

Xiaojie Li, Mingyu Wang, Baiqing Zhong, Haiqiu Huang, Guangjie Cao, Zhiyi Yu

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

2024

Atomic Cache: Enabling Efficient Fine-Grained Synchronization with Relaxed Memory Consistency on GPGPUs Through In-Cache Atomic Operations.

Yicong Zhang, Mingyu Wang, Wangguang Wang, Yangzhan Mai, Haiqiu Huang, Zhiyi Yu

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

DAW-DMR: Divergence-Aware Warped DMR with Full Error Detection for GPGPU s.

Yukun Wei, Mingyu Wang, Haiqiu Huang, Wangguang Wang, Zhiyi Yu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024