Hao Zhang
Orcid: 0000-0003-4828-7568Affiliations:
- Shanghai Jiao Tong University, Shanghai, China
According to our database1,
Hao Zhang
authored at least 7 papers
between 2017 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2025
A 12-nm High-Density Energy-Efficient 1-Mb 2R2W Scratchpad With Local Blocks for Neural Network Applications.
IEEE J. Solid State Circuits, February, 2025
2023
A DFT-Compatible In-Situ Timing Error Detection and Correction Structure Featuring Low Area and Test Overhead.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023
2021
An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Investigation of Dynamic Leakage-Suppression Logic Techniques Crossing Different Technology Nodes from 180 nm Bulk CMOS to 7 nm FinFET Plus Process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
An Area-Efficient Scannable In Situ Timing Error Detection Technique Featuring Low Test Overhead for Resilient Circuits.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
2017
A 0.2V 2.3pJ/Cycle 28dB output SNR hybrid Markov random field probabilistic-based circuit for noise immunity and energy efficiency.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017