Helder H. Avelar

Orcid: 0000-0001-5018-4651

According to our database1, Helder H. Avelar authored at least 4 papers between 2015 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
CMOS Platform for Neurochemical Detection Using 32 Graphene FETs Array at 16 kS/s per Channel.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2026

2022
A Gaussian Window for Interference Mitigation in Ka-band Digital Beamforming Systems.
Proceedings of the 13th International Symposium on Communication Systems, 2022

2018
Design and Evaluation of a Low Power CGRA Accelerator for Biomedical Signal Processing.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2015
Automatic circuit generation for sequential logic debug.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015


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