Hideaki Yamakoshi

According to our database, Hideaki Yamakoshi authored at least 2 papers between 2016 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications.

Ken Matsubara, Tsutomu Nagasawa, Yoshinobu Kaneda, Hidenori Mitani, Hiroshi Sato, Takashi Iwase, Yasunobu Aoki, Keiichi Maekawa, Hideaki Yamakoshi, Takashi Ito, Hiroyuki Kondo, Takashi Kono

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2016

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C.

Hidenori Mitani, Ken Matsubara, Hiroshi Yoshida, Takashi Hashimoto, Hideaki Yamakoshi, Shinichiro Abe, Takashi Kono, Yasuhiko Taito, Takashi Ito, Takashi Krafuji, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016