Hideo Hirono

According to our database1, Hideo Hirono authored at least 8 papers between 1992 and 1997.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

1997
Virtual control channel and its application to the massively parallel computer RWC-1.
Proceedings of the Fourth International on High-Performance Computing, 1997

1996
Multithread execution mechanisms on RICA-1 for massively parallel computation.
Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996

1995
Reduced Interprocessor-Communication Architecture and its Implementation on EM-4.
Parallel Comput., 1995

Time Space Sharing Scheduling and Architectural Support.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 1995

A prototype router for the massively parallel computer RWC-1.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1993
RICA: Reduced Interprocessor-Communication Architecture - Concept and Mechanisms.
Proceedings of the Fifth IEEE Symposium on Parallel and Distributed Processing, 1993

Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation.
Proceedings of the 7th international conference on Supercomputing, 1993

1992
Primitive Based Stereo for the Can-Picking Robots.
Proceedings of IAPR Workshop on Machine Vision Applications, 1992


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