Hikaru Hida

According to our database, Hikaru Hida authored at least 9 papers between 2004 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

Low-Power Widely Tunable Gm-C Filter Employing an Adaptive DC-blocking, Triode-Biased MOSFET Transconductor.

Shinichi Hori, Noriaki Matsuno, Tadashi Maeda, Hikaru Hida

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2007

Application of Microwave and Millimeter-Wave Circuit Technologies to InGaP-HBT ICs for 40-Gbps Optical Transmission Systems.

Ken'ichi Hosoya, Yasuyuki Suzuki, Yasushi Amamiya, Zin Yamazaki, Masayuki Mamada, Akira Fujihara, Masafumi Kawanaka, Shinichi Tanaka, Shigeki Wada, Hikaru Hida

IEICE Trans. Electron., 2007

2006

Low-power-consumption direct-conversion CMOS transceiver for multi-standard 5-GHz wireless LAN systems with channel bandwidths of 5-20 MHz.

Tadashi Maeda, Hitoshi Yano, Shinichi Hori, Noriaki Matsuno, Tomoyuki Yamase, Takashi Tokairin, Robert Walkington, Nobuhide Yoshida, Keiichi Numata, Kiyoshi Yanagisawa, Yuji Takahashi, Masahiro Fujii, Hikaru Hida

IEEE J. Solid State Circuits, 2006

A Low-Power Dual-Band Triple-Mode WLAN CMOS Transceiver.

Tadashi Maeda, Noriaki Matsuno, Shinichi Hori, Tomoyuki Yamase, Takashi Tokairin, Kiyoshi Yanagisawa, Hitoshi Yano, Robert Walkington, Keiichi Numata, Nobuhide Yoshida, Yuji Takahashi, Hikaru Hida

IEEE J. Solid State Circuits, 2006

OFDM Error Vector Magnitude Distortion Analysis.

Shingo Yamanouchi, Kazuaki Kunihiro, Hikaru Hida

IEICE Trans. Electron., 2006

2005

Low supply voltage operation of over-40-Gb/s digital ICs based on parallel-current-switching latch circuitry.

Yasushi Amamiya, Zin Yamazaki, Yasuyuki Suzuki, Masayuki Mamada, Hikaru Hida

IEEE J. Solid State Circuits, 2005

2004

120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs.

Yasuyuki Suzuki, Zin Yamazaki, Yasushi Amamiya, Shigeki Wada, Hiroaki Uchida, Chiharu Kurioka, Shinichi Tanaka, Hikaru Hida

IEEE J. Solid State Circuits, 2004

Low-power widely tunable Gm-C filter with an adaptive DC-blocking, triode-biased MOSFET transconductor.

Shinichi Hori, Tadashi Maeda, Noriaki Matsuno, Hikaru Hida

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

An efficient algorithm for simulating error vector magnitude in nonlinear OFDM amplifiers.

Shingo Yamanouchi, Kazuaki Kunihiro, Hikaru Hida

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004