Hiroaki Komatsu

According to our database, Hiroaki Komatsu authored at least 6 papers between 2002 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Speed-path analysis for multi-path failed latches with random variation.

Tsutomu Ishida, Izumi Nitta, Katsumi Homma, Yuzi Kanazawa, Hiroaki Komatsu

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2007

Design Methodology for 2.4GHz Dual-Core Microprocessor.

Noriyuki Ito, Hiroaki Komatsu, Akira Kanuma, Akihiro Yoshitake, Yoshiyasu Tanamura, Hiroyuki Sugiyama, Ryoichi Yamashita, Ken-ichi Nabeya, Hironobu Yoshino, Hitoshi Yamanaka, Masahiro Yanagida, Yoshitomo Ozeki, Kinya Ishizaka, Takeshi Kono, Yutaka Isoda

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Diagonal routing in high performance microprocessor design.

Noriyuki Ito, Hideaki Katagiri, Ryoichi Yamashita, Hiroshi Ikeda, Hiroyuki Sugiyama, Hiroaki Komatsu, Yoshiyasu Tanamura, Akihiro Yoshitake, Kazuhiro Nonomura, Kinya Ishizaka, Hiroaki Adachi, Yutaka Mori, Yutaka Isoda, Yaroku Sugiyama

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2004

Detection of multiple transitions in delay fault test of SPARC64 microprocessor.

Daisuke Maruyama, Akira Kanuma, Takashi Mochiyama, Hiroaki Komatsu, Yaroku Sugiyama, Noriyuki Ito

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003

A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor.

Noriyuki Ito, Hiroaki Komatsu, Yoshiyasu Tanamura, Ryoichi Yamashita, Hiroyuki Sugiyama, Yaroku Sugiyama, Hirofumi Hamamura

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002

SP2: A Very Large-Scale Event Driven Logic Simulation Hardware.

Hirofumi Hamamura, Hiroaki Komatsu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002