Hoang Gia Vu

Orcid: 0000-0002-5006-1894

According to our database1, Hoang Gia Vu authored at least 6 papers between 2016 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2022
Encoder-based Many-Pattern Matching on FPGAs.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022

2021
Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing.
Integr., 2021

2018
A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing.
IEICE Trans. Inf. Syst., 2018

Efficient Multitasking on FPGA Using HDL-Based Checkpointing.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
CPRring: A Structure-Aware Ring-Based Checkpointing Architecture for FPGA Computing.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016
CPRtree: A Tree-Based Checkpointing Architecture for Heterogeneous FPGA Computing.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016


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