Hohyun Chae
According to our database1,
Hohyun Chae
authored at least 3 papers
between 2023 and 2025.
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Bibliography
2025
A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface.
IEEE J. Solid State Circuits, June, 2025
Proceedings of the International Conference on Electronics, Information, and Communication, 2025
2023
A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023