Kyomin Sohn
Orcid: 0000-0002-8094-9843
According to our database1,
Kyomin Sohn
authored at least 31 papers
between 2005 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
IEEE J. Solid State Circuits, November, 2023
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.
IEEE J. Solid State Circuits, 2023
A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 35th IEEE Hot Chips Symposium, 2023
2022
Near-Memory Processing in Action: Accelerating Personalized Recommendation With AxDIMM.
IEEE Micro, 2022
Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer.
IEEE Micro, 2022
IEEE J. Solid State Circuits, 2022
A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme.
IEEE J. Solid State Circuits, 2021
IEEE Access, 2021
A Reflection and Crosstalk Canceling Continuous-Time Linear Equalizer for High-Speed DDR SDRAM.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021
2020
22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2017
A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.
IEEE J. Solid State Circuits, 2017
2016
18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2013
A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme.
IEEE J. Solid State Circuits, 2013
2012
A 1.2V 30nm 3.2Gb/s/pin 4Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2008
A 100nm Double-Stacked 500MHz 72Mb Separate-I/O Synchronous SRAM with Automatic Cell-Bias Scheme and Adaptive Block Redundancy.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
IEEE J. Solid State Circuits, 2006
A Low-power Star-topology Body Area Network Controller for Periodic Data Monitoring Around and Inside the Human Body.
Proceedings of the Tenth IEEE International Symposium on Wearable Computers (ISWC 2006), 2006
An Ultra Low-Power Body Sensor Network Control Processor with Centralized Node Control.
Proceedings of the International Symposium on System-on-Chip, 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
IEEE J. Solid State Circuits, 2005