Hohyun Chae

According to our database, Hohyun Chae authored at least 4 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A 3× Offset, 2.9× Power, 1.3× Sensing Time, and 4× Area Reduction Direct Input Transfer Offset Cancel DRAM IO Sense Amplifier With Static Current-Free Pre-Sensing.

Do-Yoon Lim, Sehee Lim, Dong Han Ko, In-Jun Jung, Giseok Kim, Dohan Kim, Donggyun Ha, Sunjong Park, Hohyun Chae, Seungjae Yei, Taehui Na, Seong-Ook Jung

IEEE J. Solid State Circuits, March, 2026

2025

A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface.

Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

IEEE J. Solid State Circuits, June, 2025

Design and Analysis of Static-Free PAM-4 Transmitter for HBM TSV Interface.

Jeonghyeok You, Hohyun Chae, Taeryeong Kim, Ji Hoon Lee, Seong-Ook Jung

Proceedings of the International Conference on Electronics, Information, and Communication, 2025

2023

A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC.

Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023