Hong-Yean Hsieh

According to our database, Hong-Yean Hsieh authored at least 5 papers between 1994 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

A First-Order Tree-Structured DAC With Reduced Signal-Band Noise.

Hong-Yean Hsieh, Leon Lin

IEEE Trans. Circuits Syst. II Express Briefs, 2007

2000

Integrated parametric timing optimization of digital systems.

Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1997

Clocking Optimization and Distribution in Digital Systems with Scheduled Skews.

Hong-Yean Hsieh, Wentai Liu, Paul D. Franzon, Ralph K. Cavin III

J. VLSI Signal Process., 1997

1995

Concurrent timing optimization of latch-based digital systems.

Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C. Thomas Gray

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

1994

Circuit delay calculation considering data dependent delays.

C. Thomas Gray, Wentai Liu, Ralph K. Cavin III, Hong-Yean Hsieh

Integr., 1994