Horng-Fei Jyu

According to our database, Horng-Fei Jyu authored at least 5 papers between 1992 and 1995.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1995

Prediction of interconnect delay in logic synthesis.

Horng-Fei Jyu, Sharad Malik

Proceedings of the 1995 European Design and Test Conference, 1995

1994

Statistical Delay Modeling in Logic Design and Synthesis.

Horng-Fei Jyu, Sharad Malik

Proceedings of the 31st Conference on Design Automation, 1994

1993

Statistical timing analysis of combinational logic circuits.

Horng-Fei Jyu, Sharad Malik, Srinivas Devadas, Kurt Keutzer

IEEE Trans. Very Large Scale Integr. Syst., 1993

Statistical Timing Optimization of Combinatorial Logic Circuits.

Horng-Fei Jyu, Sharad Malik

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1992

Statistical Timing Analysis of Combinational Circuits.

Srinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992