Hsiang-Chieh Jhan

According to our database1, Hsiang-Chieh Jhan authored at least 2 papers between 2016 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2017
An Efficient Two-Phase ILP-Based Algorithm for Precise CMOS RFIC Layout Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016
Novel CMOS RFIC layout generation with concurrent device placement and fixed-length microstrip routing.
Proceedings of the 53rd Annual Design Automation Conference, 2016


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