Hsu-Yu Kao

Orcid: 0000-0003-2644-0007

Affiliations:
  • Chung Yuan Christian University, Taiwan


According to our database1, Hsu-Yu Kao authored at least 10 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
A Reinforcement Learning Methodology for The Search of SRAM CIM-based Accelerator Configuration.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

A Behavior-Level Simulation Framework for RRAM-Based Deep Learning Accelerators with Flexible Architecture Configurations.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
Block-Based Compression and Corresponding Hardware Circuits for Sparse Activations.
Sensors, 2021

Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing.
Sensors, 2021

Hybrid Dynamic Fixed Point Quantization Methodology for AI Accelerators.
Proceedings of the 18th International SoC Design Conference, 2021

Block-Based Compression for Reducing Indexing Cost of DNN Accelerators.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

2020
Co-Optimization of Grid-Based TAM Wire Routing and Test Scheduling with Reconfigurable Wrappers.
Proceedings of the 38th IEEE VLSI Test Symposium, 2020

2019
A Design Framework for Hardware Approximation of Deep Neural Networks.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019

Hardware Implementation for Multiple Activation Functions.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

3D Test Wrapper Chain Optimization with I/O Cells Binding Considered.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019


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