Hung-Wei Tseng

Orcid: 0000-0001-8383-5203

Affiliations:
  • University of California, Riverside, CA, USA
  • North Carolina State University, NC, USA (former)
  • University of California, San Diego, CA, USA (former)
  • National Taiwan University, Taipei, Taiwan (former)


According to our database1, Hung-Wei Tseng authored at least 36 papers between 2004 and 2023.

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Timeline

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Bibliography

2023
FLIXR: Embedding Index Into Flash Translation Layer in SSDs.
IEEE Trans. Computers, 2023

Simultaneous and Heterogenous Multithreading.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

TensorCV: Accelerating Inference-Adjacent Computation Using Tensor Processors.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

Rethinking Programming Frameworks for In-Storage Processing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
TCUDB: Accelerating Database with Tensor Processors.
Proceedings of the SIGMOD '22: International Conference on Management of Data, Philadelphia, PA, USA, June 12, 2022

SIMD<sup>2</sup>: a generalized matrix instruction set for accelerating tensor computation beyond GEMM.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021
GPTPU: Accelerating Applications using Edge Tensor Processing Units.
CoRR, 2021

Accelerating applications using edge tensor processing units.
Proceedings of the International Conference for High Performance Computing, 2021

OpenUVR: an Open-Source System Framework for Untethered Virtual Reality Applications.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

NDS: N-Dimensional Storage.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

TPUPoint: Automatic Characterization of Hardware-Accelerated Machine-Learning Behavior for Cloud Computing.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Dancing in the Dark: Profiling for Tiered Memory.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

2020
Varifocal Storage: Dynamic Multiresolution Data Storage.
IEEE Micro, 2020

2019
Dynamic Multi-Resolution Data Storage.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

GraphSSD: graph semantics aware SSD.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018
Morpheus: Exploring the Potential of Near-Data Processing for Creating Application Objects in Heterogeneous Computing.
ACM SIGOPS Oper. Syst. Rev., 2018

Pensieve: a Machine Learning Assisted SSD Layer for Extending the Lifetime.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018

2017
Summarizer: trading communication with computing near storage.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Improving SSD lifetime with byte-addressable metadata.
Proceedings of the International Symposium on Memory Systems, 2017

KAML: A Flexible, High-Performance Key-Value SSD.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016
HippogriffDB: Balancing I/O and GPU Bandwidth in Big Data Analytics.
Proc. VLDB Endow., 2016

Morpheus: Creating Application Objects Efficiently for Heterogeneous Computing.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

SPMario: Scale up MapReduce with I/O-Oriented Scheduling for the GPU.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Hippogriff: Efficiently moving data in heterogeneous computing systems.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2014
Data-Triggered Threads.
PhD thesis, 2014

CDTT: Compiler-generated data-triggered threads.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013
Evaluating student understanding of core concepts in computer architecture.
Proceedings of the Innovation and Technology in Computer Science Education conference 2013, 2013

Underpowering NAND flash: profits and perils.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Eliminating Redundant Computation and Exposing Parallelism through Data-Triggered Threads.
IEEE Micro, 2012

Software data-triggered threads.
Proceedings of the 27th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2012

2011
Data-triggered threads: Eliminating redundant computation.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Understanding the impact of power loss on flash memory.
Proceedings of the 48th Design Automation Conference, 2011

2008
Energy-Aware Flash Memory Management in Virtual Memory System.
IEEE Trans. Very Large Scale Integr. Syst., 2008

2006
An energy-efficient virtual memory system with flash memory as the secondary storage.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

2005
Utilization based duty cycle tuning MAC protocol for wireless sensor networks.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

2004
Tolerating memory latency through push prefetching for pointer-intensive applications.
ACM Trans. Archit. Code Optim., 2004


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