Chen-Chien Kao

According to our database, Chen-Chien Kao authored at least 5 papers between 2020 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Hybrid Precoding Baseband Processor for 64 × 64 Millimeter Wave MIMO Systems.

Chen-Chien Kao, Chiao-En Chen, Chia-Hsiang Yang

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Hardware Acceleration in Large-Scale Tensor Decomposition for Neural Network Compression.

Chen-Chien Kao, Yi-Yen Hsieh, Chao-Hung Chen, Chia-Hsiang Yang

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2020

A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular Systems.

Chi-Chih Wen, Yu-Chi Lee, Yi-Chung Wu, Chen-Chien Kao, Chia-Hsiang Yang

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Iterative Receiver with a Lattice-Reduction-Aided MIMO Detector for IEEE 802.11ax.

Yao-Pin Wang, Chi-Chih Wen, Chen-Chien Kao, Chung-Jung Huang, Der-Zheng Liu, Chia-Hsiang Yang

Proceedings of the IEEE Global Communications Conference, 2020

Equivalent Capacitance Guided Dummy Fill Insertion for Timing and Manufacturability.

Sheng-Jung Yu, Chen-Chien Kao, Chia-Han Huang, Iris Hui-Ru Jiang

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020