Hyochang Kim

According to our database, Hyochang Kim authored at least 5 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A 16-Gb/s/Wire 4-Wire Short-Haul Transceiver With Balanced Single-Ended Signaling (BASES) in 28-nm CMOS.

Hyochang Kim, Hyeongmin Seo, Hyuntae Kim, Changsik Yoo, Jaeduk Han

IEEE Trans. Circuits Syst. II Express Briefs, August, 2023

A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.

Yesin Ryu, Sung-Gi Ahn, Jae Hoon Lee, Jaewon Park, Yong-Ki Kim, Hyochang Kim, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Suk Han Lee, Kyounghwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong, Sunghwan Jo, Dajung Cho, Sooyoung Kim, Minsu Lee, Hyunho Kim, Minhwan Kim, Jae San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young-Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee

IEEE J. Solid State Circuits, 2023

2020

A 6-Gb/s Wireline Receiver With Intrapair Skew Compensation and Three-Tap Decision-Feedback Equalizer in 28-nm CMOS.

Hyochang Kim, Changsik Yoo

IEEE Trans. Very Large Scale Integr. Syst., 2020

2017

Duty-cycle and phase spacing error correction circuit for high-speed serial link.

Hyochang Kim, Ook Kim, Changsik Yoo

IEICE Electron. Express, 2017

2016

A HDMI-to-MHL video format conversion system-on-chip (SoC) for mobile handset in a 130-nm CMOS technology.

Hyochang Kim, Jaewoo Park, Woosang Han, Kyuhwan Oh, Taekjun Ahn, Jun-Gi Jo, Ook Kim, Changsik Yoo

Proceedings of the IEEE International Conference on Consumer Electronics, 2016