Hyun-jeong Kwon
Orcid: 0000-0003-3356-0357Affiliations:
- Pohang University of Science and Technology, South Korea
According to our database1,
Hyun-jeong Kwon
authored at least 11 papers
between 2016 and 2021.
Collaborative distances:
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Bibliography
2021
Variation-Aware SRAM Cell Optimization Using Deep Neural Network-Based Sensitivity Analysis.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Machine Learning Framework for Early Routability Prediction with Artificial Netlist Generator.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
SoftCorner: Relaxation of Corner Values for Deterministic Static Timing Analysis of VLSI Systems.
IEEE Access, 2018
Proceedings of the International SoC Design Conference, 2018
2017
Utilization of relieved corners from multi-corner libraries in deterministic static timing analysis.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017
Proceedings of the International SoC Design Conference, 2017
2016
Calculating the probability of timing violation of F/F-controlled paths with timing variations.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016