Hyundong Lee

Orcid: 0000-0002-4329-7057

According to our database1, Hyundong Lee authored at least 10 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2023
T<sup>3</sup>L: A Practical Implementation of Tri-Transistor Ternary Logic Based on Inkjet-Printed Anti-Ambipolar Transistors and CMOSs of Thin-Film Structure.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

Cache Register Sharing Structure for Channel-level Near-memory Processing in NAND Flash Memory.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

HFGCN: High-speed and Fully-optimized GCN Accelerator.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

High-throughput PIM (Processing in-Memory) for DRAM using Bank-level Pipelined Architecture.
Proceedings of the 20th International SoC Design Conference, 2023

2022
Circuit-Level Exploration of Ternary Logic Using Memristors and MOSFETs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Ternary Competitive to Binary: A Novel Implementation of Ternary Logic Using Depletion-mode and Conventional MOSFETs.
Proceedings of the 52nd IEEE International Symposium on Multiple-Valued Logic, 2022

A Convenient Implementation of the Ternary Logic: Using Anti-Ambipolar Transistors and PMOS Based on Printed Carbon Nanotubes.
Proceedings of the 52nd IEEE International Symposium on Multiple-Valued Logic, 2022

2021
A Practical Implementation of the Ternary Logic Using Memristors and MOSFETs.
Proceedings of the 51st IEEE International Symposium on Multiple-Valued Logic, 2021

2019
Automatic Generation of Game Content using a Graph-based Wave Function Collapse Algorithm.
Proceedings of the IEEE Conference on Games, 2019

2018
Deep motion transfer without big data.
Proceedings of the Special Interest Group on Computer Graphics and Interactive Techniques Conference, 2018


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