Ilias Bouras

According to our database, Ilias Bouras authored at least 12 papers between 1996 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2004

A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-μm CMOS transceiver for 802.11a/b/g wireless LAN.

Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis, Nikos Haralabidis

IEEE J. Solid State Circuits, 2004

A cost-efficient 0.18 μm CMOS RF transceiver using a fractional-N synthesizer for 802.11b/g wireless LAN applications.

Nikos Haralabidis, Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN.

Iason Vassiliou, Kostis Vavelidis, Theodore Georgantas, Sofoklis Plevridis, Nikos Haralabidis, George Kamoulakos, Charalambos Kapnistis, Spyros Kavadias, Yiannis Kokolakis, Panagiotis Merakos, Jacques C. Rudell, Akira Yamanaka, Stamatis Bouras, Ilias Bouras

IEEE J. Solid State Circuits, 2003

A single-chip, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, 0.18μm CMOS RF transceiver for 802.11a/b/g wireless LAN.

Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis, Nikos Haralabidis

Proceedings of the ESSCIRC 2003, 2003

2002

Charge Pump Circuits for Low-voltage Applications.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

VLSI Design, 2002

2001

A high-performance low-power static differential double edge-triggered flip-flop.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni, Lampros Dermentzoglou

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A CMOS differential logic for low-power and high-speed applications.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

A CMOS charge pump for low voltage operation.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A high speed low power CMOS clock driver using charge recycling technique.

Ilias Bouras, Yiannis Liaperdos, Angela Arapoyanni

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

High performance level restoration circuits for low-power reduced-swing interconnect schemes.

Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni

Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

1999

Performance comparison of driver architectures in submicron CMOS and BiCMOS technologies for low voltage operation.

Ioannis Moisiadis, Ilias Bouras, Constantin Papadas, Angela Arapoyanni

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1996

Architectures for block Toeplitz systems.

Ilias Bouras, George-Othon Glentis, Nicholas Kalouptsidis

Signal Process., 1996