Iuri Mehr

According to our database1, Iuri Mehr authored at least 17 papers between 1994 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
A 40 nm Fully Integrated 82 mW Stereo Headphone Module for Mobile Applications.
IEEE J. Solid State Circuits, 2014

2013
A 62mW stereo class-G headphone driver with 108dB dynamic range and 600µA/channel quiescent current.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A direct-battery hookup, fully integrated stereo headphone module with 82 mW output power and 110 dB PSRR.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A 60 mW Class-G Stereo Headphone Driver for Portable Battery-Powered Devices.
IEEE J. Solid State Circuits, 2012

2011
A 60mW 1.15mA/channel Class-G Stereo Headphone Driver with 111dB DR and 120dB PSRR.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2007
A High Dynamic Range CMOS Variable Gain Amplifier for Mobile DTV Tuner.
IEEE J. Solid State Circuits, 2007

2006
A 375-mW Quadrature Bandpass$\Delta\Sigma$ADC With 8.5-MHz BW and 90-dB DR at 44 MHz.
IEEE J. Solid State Circuits, 2006

A 375mW Quadrature Bandpass ΔΣ ADC with 90dB DR and 8.5MHz BW at 44MHz.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2002
A 12-bit integrated analog front end for broadband wireline networks.
IEEE J. Solid State Circuits, 2002

2001
A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input.
IEEE J. Solid State Circuits, 2001

2000
A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC.
IEEE J. Solid State Circuits, 2000

1999
A 500-MSample/s, 6-bit Nyquist-rate ADC for disk-drive read-channel applications.
IEEE J. Solid State Circuits, 1999

A 55-mW, 10-bit, 10 Msample/s Nyquist rate CMOS ADC.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1997
A CMOS continuous-time G<sub>m</sub>-C filter for PRML read channel applications at 150 Mb/s and beyond.
IEEE J. Solid State Circuits, 1997

1996
Parallel neural network learning through repetitive bounded depth trajectory branching.
Neural Parallel Sci. Comput., 1996

1994
A 16-Bit Current Sample/Hold Circuit Using a Digital CMOS Process.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

High Speed Analog Filtering Using Feedforward Neural Network Architectures.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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