Izumi Fukasaku

According to our database, Izumi Fukasaku authored at least 4 papers between 1997 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

An Active-Copper-Cable with Continuous-Time-Linear-Equalizer IC for 30-AWG 7-meters Reach Interconnect of 400-Gbit/s QSFP-DD.

Koji Maeda, Shoji Yamamoto, Naohiro Kohmu, Kei Nishimura, Izumi Fukasaku

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

An Active Copper-Cable Supporting 56-Gbit/s PAM4 and 28-Gbit/s NRZ with Continuous Time Linear Equalizer IC for to-Meters Reach Interconnection.

Koji Maeda, Takayasu Norimatsu, Kenji Kogo, Naohiro Kohmu, Kei Nishimura, Izumi Fukasaku

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

1998

TITAC-2: An Asynchronous 32-bit Microprocessor.

Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya

Proceedings of the ASP-DAC '98, 1998

1997

TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.

Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997