Taro Fujii

According to our database, Taro Fujii authored at least 10 papers between 1997 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications.

Koichi Nose, Taro Fujii, Katsumi Togawa, Shunsuke Okumura, Kentaro Mikami, Daichi Hayashi, Teruhito Tanaka, Takao Toi

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2018

New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications.

Taro Fujii, Takao Toi, Teruhito Tanaka, Katsumi Togawa, Toshiro Kitaoka, Kengo Nishino, Noritsugu Nakamura, Hiroki Nakahara, Masato Motomura

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2013

Optimizing time and space multiplexed computation in a dynamically reconfigurable processor.

Takao Toi, Noritsugu Nakamura, Taro Fujii, Toshiro Kitaoka, Katsumi Togawa, Koichiro Furuta, Toru Awashima

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join.

Eric Shun Fukuda, Hideyuki Kawashima, Hiroaki Inoue, Taro Fujii, Koichiro Furuta, Tetsuya Asai, Masato Motomura

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2004

Techniques for Virtual Hardware on a Dynamically Reconfigurable Processor - An Approach to Tough Cases.

Hideharu Amano, Takeshi Inuo, Hirokazu Kami, Taro Fujii, Masayasu Suzuki

Proceedings of the Field Programmable Logic and Application, 2004

2002

Linear fuzzy clustering based on least absolute deviations.

Katsuhiro Honda, Nobuhiro Togo, Taro Fujii, Hidetomo Ichihashi

Proceedings of the 2002 IEEE International Conference on Fuzzy Systems, 2002

2000

A Virtual Hardware System on a Dynamically Reconfigurable Logic Device.

Yuichiro Shibata, Masaki Uno, Hideharu Amano, Koichiro Furuta, Taro Fujii, Masato Motomura

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

Spatial-temporal mapping of real applications on a Dynamically Reconfigurable Logic Engine (DRLE) LSI.

Koichiro Furuta, Taro Fujii, Masato Motomura, Kazutoshi Wakabayashi, Masakazu Yamashina

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1998

TITAC-2: An Asynchronous 32-bit Microprocessor.

Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya

Proceedings of the ASP-DAC '98, 1998

1997

TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.

Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997