Motokazu Ozawa

According to our database1, Motokazu Ozawa authored at least 8 papers between 1997 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2006
Development of processor cores for digital consumer appliances.
Systems and Computers in Japan, 2006

Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core.
IEICE Transactions, 2006

2005
SH-X: an embedded processor core for consumer appliances.
SIGARCH Computer Architecture News, 2005

A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones.
IEICE Transactions, 2005

Low-Power Design of 90-nm SuperH Processor Core.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

2001
Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors.
Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001

1998
TITAC-2: An Asynchronous 32-bit Microprocessor.
Proceedings of the ASP-DAC '98, 1998

1997
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997


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