J. Apolinar Reynoso-Hernández
Orcid: 0000-0003-4131-4981
According to our database1,
J. Apolinar Reynoso-Hernández authored at least 8 papers
between 2012 and 2023.
Collaborative distances:
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Bibliography
2023
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023
2016
FPGA-based test bed for measurement of AM/AM and AM/PM distortion and modeling memory effects in RF PAs.
Integr., 2016
2015
Modeling memory effects in RF power amplifiers applied to a digital pre-distortion algorithm and emulated on a DSP-FPGA board.
Integr., 2015
Test bed for low-cost measurement of AM/AM and AM/PM effects in RF PAs based on FPGA.
Proceedings of the 25. International Conference on Electronics, 2015
2014
Res. Comput. Sci., 2014
A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
2013
A simple procedure to synthesize input and output matching networks with short stub for class F<sup>-1</sup> PAs.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2012
Nuevo método analítico para calcular la impedancia característica ZC de líneas de transmisión uniformes.
Computación y Sistemas, 2012