José Raúl Loo-Yau
Orcid: 0000-0001-7467-2537Affiliations:
- University of Guadalajara, Mexico
According to our database1,
José Raúl Loo-Yau
authored at least 9 papers
between 2012 and 2023.
Collaborative distances:
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Bibliography
2023
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023
2019
Simple and Low-Cost Measurement Test Setup to Determine the RF, LO and IF Impedances for Designing GaN FET Resistive Mixer.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2016
FPGA-based test bed for measurement of AM/AM and AM/PM distortion and modeling memory effects in RF PAs.
Integr., 2016
2015
Proceedings of the 12th International Conference on Electrical Engineering, 2015
2014
Implementation of a NARX neural network in a FPGA for modeling the inverse characteristics of power amplifiers.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
Proceedings of the Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, 2014
2013
A simple procedure to synthesize input and output matching networks with short stub for class F<sup>-1</sup> PAs.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012