Jaroslav Skarvada

According to our database, Jaroslav Skarvada authored at least 7 papers between 2006 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

The Use of Genetic Algorithm to Reduce Power Consumption during Test Application.

Jaroslav Skarvada, Zdenek Kotásek, Josef Strnadel

Proceedings of the Evolvable Systems: From Biology to Hardware, 2010

The Use of Genetic Algorithm to Derive Correlation Between Test Vector and Scan Register Sequences and Reduce Power Consumption.

Zdenek Kotásek, Jaroslav Skarvada, Josef Strnadel

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Reduction of power dissipation through parallel optimization of test vector and scan register sequences.

Zdenek Kotásek, Jaroslav Skarvada, Josef Strnadel

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2008

Testability analysis based on the identification of testable blocks with predefined properties.

Jaroslav Skarvada, Zdenek Kotásek, Tomas Herrman

Microprocess. Microsystems, 2008

Instruction-based development: From evolution to generic structures of digital circuits.

Michal Bidlo, Jaroslav Skarvada

Int. J. Knowl. Based Intell. Eng. Syst., 2008

Power Conscious RTL Test Scheduling.

Jaroslav Skarvada, Zdenek Kotásek, Tomas Herrman

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2006

Test Scheduling for SoC under Power Constraints.

Jaroslav Skarvada

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006