Jason Agron

According to our database1, Jason Agron authored at least 17 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2012
Automating the design of mLUT MPSoPC FPGAs in the cloud.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2010
Operating System Structures for Multiprocessor Systems on Programmable Chip.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Distributed Hardware-Based Microkernels: Making Heterogeneous OS Functionality a System Primitive.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

2009
Hardware Microkernels for Heterogeneous Manycore Systems.
Proceedings of the ICPPW 2009, 2009

Building heterogeneous reconfigurable systems using threads.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Model-Driven Engineering from Modular Monadic Semantics: Implementation Techniques Targeting Hardware and Software.
Proceedings of the Domain-Specific Languages, IFIP TC 2 Working Conference, 2009

Domain-Specific Language for HW/SW Co-design for FPGAs.
Proceedings of the Domain-Specific Languages, IFIP TC 2 Working Conference, 2009

Building heterogeneous reconfigurable systems with a hardware microkernel.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008
Achieving Programming Model Abstractions for Reconfigurable Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Modeling Abstractions for Next Generation Reconfigurable Computing.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

Symmetric Multiprocessor Design for Hybrid CPU/FPGA SoCs.
Proceedings of the Reconfigurable Computing: Architectures, 2008

2007
Supporting High Level Language Semantics Within Hardware Resident Threads.
Proceedings of the FPL 2007, 2007

Memory Hierarchy for MCSoPC Multithreaded Systems.
Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007

2006
Run-Time Services for Hybrid CPU/FPGA Systems on Chip.
Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS 2006), 2006

Hthreads: A Computational Model for Reconfigurable Devices.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Enabling a Uniform Programming Model Across the Software/Hardware Boundary.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

The Case for High Level Programming Models for Reconfigurable Computers.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006


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