Miaoqing Huang

Orcid: 0000-0001-7376-3744

According to our database1, Miaoqing Huang authored at least 65 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2024
A Reliable and Efficient Online Solution for Adaptive Voltage and Frequency Scaling on FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., June, 2024

An optimized EEGNet processor for low-power and real-time EEG classification in wearable brain-computer interfaces.
Microelectron. J., 2024

Sequence Graph Network for Online Debate Analysis.
CoRR, 2024

The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators.
Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

2023
FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Accelerating LSTM-Based High-Rate Dynamic System Models.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
A Masked Pure-Hardware Implementation of Kyber Cryptographic Algorithm.
IACR Cryptol. ePrint Arch., 2022

Self-Supervised Domain Adaptation in Crowd Counting.
Proceedings of the 2022 IEEE International Conference on Image Processing, 2022

High-Rate Machine Learning for Forecasting Time-Series Signals.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

BrainVGAE: End-to-End Graph Neural Networks for Noisy fMRI Dataset.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2022

A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2022

2021
Power-based Side Channel Attack Analysis on PQC Algorithms.
IACR Cryptol. ePrint Arch., 2021

2020
A pure hardware implementation of CRYSTALS-KYBER PQC algorithm through resource reuse.
IEICE Electron. Express, 2020

2019
Generic attribute revocation systems for attribute-based encryption in cloud storage.
Frontiers Inf. Technol. Electron. Eng., 2019

2017
MIC in GIS.
Proceedings of the Encyclopedia of GIS., 2017

GPGPU in GIS.
Proceedings of the Encyclopedia of GIS., 2017

Study of parallel programming models on computer clusters with Intel MIC coprocessors.
Int. J. High Perform. Comput. Appl., 2017

PolyPC: Polymorphic parallel computing framework on embedded reconfigurable system.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Accelerating the calculation of minimum set of viewpoints for maximum coverage over digital elevation model data by hybrid computer architecture and systems.
ACM SIGSPATIAL Special, 2016

A hybrid parallel cellular automata model for urban growth simulation over GPU/CPU heterogeneous architectures.
Int. J. Geogr. Inf. Sci., 2016

OOGen: An Automated Generation Tool for Custom MPSoC Architectures Based on Object-Oriented Programming Methods.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
Archborn: an open source tool for automated generation of chip heterogeneous multiprocessor architectures.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Exploiting hardware abstraction for hybrid parallel computing framework.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Achieving energy-efficiency on MPSoCs: performance and power optimizations.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Towards Optimal Task Distribution on Computer Clusters with Intel MIC Coprocessors.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015

An Automatic Design Flow for Hybrid Parallel Computing on MPSoCs (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Performance and Energy Optimization on MPSoCs by Enabling STT-MRAM LUTs.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014
A unified OpenCL-flavor programming model with scalable hybrid hardware platform on FPGAs.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Comparison of Parallel Programming Models on Intel MIC Computer Cluster.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Improve memory access for achieving both performance and energy efficiencies on heterogeneous systems.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

A Hierarchical Memory Architecture with NoC Support for MPSoC on FPGAs.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Parallelizing computer vision algorithms on acceleration technologies: A SIFT case study.
Proceedings of the IEEE China Summit & International Conference on Signal and Information Processing, 2014

2013
Modular Design of Fully Pipelined Reduction Circuits on FPGAs.
IEEE Trans. Parallel Distributed Syst., 2013

A delay-based PUF design using multiplexer chains.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Improve Effective Capacity and Lifetime of Solid State Drives.
Proceedings of the IEEE Eighth International Conference on Networking, 2013

Accelerating Geospatial Applications on Hybrid Architectures.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Accelerating Applications Using GPUs on Embedded Systems and Mobile Devices.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

A Delay-based PUF Design Using Multiplexers on FPGA.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012
Efficient Mapping of Task Graphs onto Reconfigurable Hardware Using Architectural Variants.
IEEE Trans. Computers, 2012

Towards efficient GPU sharing on multicore processors.
SIGMETRICS Perform. Evaluation Rev., 2012

High-Performance Reconfigurable Computing.
Int. J. Reconfigurable Comput., 2012

Developing application-specific multiprocessor platforms on FPGAs.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Improving the Performance of On-Board Cache for Flash-Based Solid-State Drives.
Proceedings of the Seventh IEEE International Conference on Networking, 2012

Automating the design of mLUT MPSoPC FPGAs in the cloud.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Scalable Memory Hierarchies for Embedded Manycore Systems.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011
New Hardware Architectures for Montgomery Modular Multiplication Algorithm.
IEEE Trans. Computers, 2011

Exploiting concurrent kernel execution on graphic processing units.
Proceedings of the 2011 International Conference on High Performance Computing & Simulation, 2011

Creating HW/SW co-designed MPSoPC's from high level programming models.
Proceedings of the 2011 International Conference on High Performance Computing & Simulation, 2011

Scaling scientific applications on clusters of hybrid multicore/GPU nodes.
Proceedings of the 8th Conference on Computing Frontiers, 2011

2010
Reconfiguration and Communication-Aware Task Scheduling for High-Performance Reconfigurable Computing.
ACM Trans. Reconfigurable Technol. Syst., 2010

Parameterized Hardware Design on Reconfigurable Computers: An Image Processing Case Study.
Int. J. Reconfigurable Comput., 2010

Operating System Structures for Multiprocessor Systems on Programmable Chip.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Modular design of fully pipelined accumulators.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Reaping the Processing Potential of FPGA on Double-Precision Floating-Point Operations: An Eigenvalue Solver Case Study.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Efficient cache design for solid-state drives.
Proceedings of the 7th Conference on Computing Frontiers, 2010

2009
RDMS: A hardware task scheduling algorithm for Reconfigurable Computing.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants.
Proceedings of the FCCM 2009, 2009

2008
Portable library development for reconfigurable computing systems: A case study.
Parallel Comput., 2008

The Promise of High-Performance Reconfigurable Computing.
Computer, 2008

Hardware task scheduling optimizations for reconfigurable computing.
Proceedings of the 2008 Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications, 2008

A Framework to Improve IP Portability on Reconfigurable Computers.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

2007
An Optimized Hardware Architecture of Montgomery Multiplication Algorithm.
IACR Cryptol. ePrint Arch., 2007

A Portable Memory Access Framework on Reconfigurable Computers.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2005
Performance of Sorting Algorithms on the SRC 6 Reconfigurable Computer.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005


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