Jayaram Bhasker

According to our database, Jayaram Bhasker authored at least 13 papers between 1987 and 2004.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of two.

2004

Improving Design and Verification Productivity with VHDL-200x.

Stephen Bailey, Erich Marschner, Jayaram Bhasker, Jim Lewis, Peter J. Ashenden

Proceedings of the 2004 Design, 2004

1996

Die VHDL-Syntax.

Jayaram Bhasker

Markt und Technik, ISBN: 978-3-8272-9528-6, 1996

1995

Datapath synthesis using a problem-space genetic algorithm.

Muhammad K. Dhodhi, Frank H. Hielscher, Robert H. Storer, Jayaram Bhasker

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1994

Size, chromatic number, and connectivity.

Jayaram Bhasker, Tariq Samad, Douglas B. West

Graphs Comb., 1994

1991

Simulation-Based Verification for High-Level Synthesis.

Rolf Ernst, Jayaram Bhasker

IEEE Des. Test Comput., 1991

1990

An Optimizer for Hardware Synthesis.

Jayaram Bhasker, Huan-Chih Lee

IEEE Des. Test Comput., 1990

1989

Via Assignment in Single-Row Routing.

Jayaram Bhasker, Sartaj Sahni

IEEE Trans. Computers, 1989

1988

Process-graph Analyser: A Front-end Tool for VHDL Behavioural Synthesis.

Jayaram Bhasker

Softw. Pract. Exp., 1988

Implementation of an optimizing compiler for VHDL.

Jayaram Bhasker

ACM SIGPLAN Notices, 1988

A Linear Algorithm to Find a Rectangular Dual of a Planar Triangulated Graph.

Jayaram Bhasker, Sartaj Sahni

Algorithmica, 1988

1987

A linear time algorithm to check for the existence of a rectangular dual of a planar triangulated graph.

Jayaram Bhasker, Sartaj Sahni

Networks, 1987

Compacting MIMOLA microcode.

Jayaram Bhasker, Tariq Samad

Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

An algorithm for microcode compaction of VHDL behavioral descriptions.

Jayaram Bhasker

Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987