Jean-Louis Houle
According to our database1,
Jean-Louis Houle
authored at least 13 papers
between 1988 and 2005.
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Bibliography
2005
A system level implementation strategy and partitioning heuristic for LUT-based applications.
Comput. Electr. Eng., 2005
2003
Improvement of sensor accuracy in the case of a variable surface reflectance gradient for active laser range finders.
IEEE Trans. Instrum. Meas., 2003
2000
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000
1999
A Geomatic System for Real-Time Applications.
Proceedings of the 17th IASTED International Conference on Applied Informatics, 1999
1995
Equivalence Proofs of Some Yield Modeling Methods for Defect-Tolerant Integrated Circuits.
IEEE Trans. Computers, 1995
1994
A Fast Method to Evaluate the Optimum Number of Spares in Defect-Tolerant Integrated Circuits.
IEEE Trans. Computers, 1994
FPGA Implementation of Wavelet Transforms.
Proceedings of the 12st IASTED International Conference on Applied Informatics, 1994
1993
A High Speed Parallel Structure for the Basic Wavelet Transform Algorithm.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1992
Performance improvements to VLSI parallel systems, using dynamic concatenation of processing resources.
Parallel Comput., 1992
Heuristic Prediction of the Optimum Number of spares in Defect-Tolerant Integrated Circuits.
J. Circuits Syst. Comput., 1992
J. Electron. Test., 1992
1990
Impact of reconfiguration logic on the optimization of defect-tolerant integrated circuits.
Proceedings of the 20th International Symposium on Fault-Tolerant Computing, 1990
1988
Mathematical model for simulation of hierarchically distributed process control computer systems.
Autom., 1988