Jean Simatic

According to our database, Jean Simatic authored at least 10 papers between 2016 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

From High-Level Synthesis to Bundled-Data Circuits.

Yoan Decoudu, Jean Simatic, Katell Morin-Allory, Laurent Fesquet

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

2019

Comparison of Synchronous and Asynchronous FIR Filter Architectures.

Yoan Decoudu, Jean Simatic, Pauline Alexandre, Katell Morin-Allory, Laurent Fesquet

Proceedings of the 5th International Conference on Event-Based Control, 2019

From Signal Transition Graphs to Timing Closure: Application to Bundled-Data Circuits.

Grégoire Gimenez, Jean Simatic, Laurent Fesquet

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2017

On-the-fly and sub-gate-delay resolution TDC based on self-timed ring: A proof of concept.

Assia El-Hadbi, Abdelkarim Cherkaoui, Oussama Elissati, Jean Simatic, Laurent Fesquet

Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Seeking low-power synchronous/asynchronous systems: A FIR implementation case study.

Ali Skaf, Jean Simatic, Laurent Fesquet

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

CAR: On the highway towards de-synchronization.

François Bertrand, Abdelkarim Cherkaoui, Jean Simatic, Anthony Maure, Laurent Fesquet

Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

High-level synthesis of an event-driven windowing process.

Saeed Mian Qaisar, Jean Simatic, Laurent Fesquet

Proceedings of the 3rd International Conference on Event-Based Control, 2017

A Practical Framework for Specification, Verification, and Design of Self-Timed Pipelines.

Jean Simatic, Abdelkarim Cherkaoui, François Bertrand, Rodrigo Possamai Bastos, Laurent Fesquet

Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017

2016

New asynchronous protocols for enhancing area and throughput in bundled-data pipelines.

Jean Simatic, Abdelkarim Cherkaoui, Rodrigo Possamai Bastos, Laurent Fesquet

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

High-level synthesis for event-based systems.

Jean Simatic, Rodrigo Possamai Bastos, Laurent Fesquet

Proceedings of the Second International Conference on Event-based Control, 2016