Jeffrey M. Huard

According to our database, Jeffrey M. Huard authored at least 5 papers between 2003 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers.

Ranganathan Desikachari, Mark Steeds, Jeffrey M. Huard, Un-Ku Moon

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2005

Special issue on BIT CMOS built-in test architecture for high-speed jitter measurement.

Karen Taylor, Bryan Nelson, Alan Chong, Henry C. Lin, Eddie Chan, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz

IEEE Trans. Instrum. Meas., 2005

2004

Experimental Results for High-Speed Jitter Measurement Technique.

Karen Taylor, Bryan Nelson, Alan Chong, Hieu Nguyen, Henry C. Lin, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO.

Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y. Wong

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

CMOS Built-In Test Architecture for High-Speed Jitter Measurement.

Henry C. Lin, Karen Taylor, Alan Chong, Eddie Chan, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003